If those look the same to you, you need to have your eyes checked.  I have owned many many many GPU's and none look the fake rendering provided by BFL.

The BFL version is a REALLY BAD RENDERING where they took a picture of a GPU and superimposed it on a rendered flat object.  (Not unlike the photo-shopped version of the singles they used to sell their last batch of pre-orders).  The fan shown should press up against the face of the card but if you draw a line from the edge of the metal straight back you'll see that the fan is simply a picture on a flat surface... the rendering shows no depth.  It's a camera trick.  The fake image they are showing implies the "gpu" is as much as a 1/4 inch narrower than the metal mount on each side. 

If you look at the fan in the image you supplied that fan would NEVER fit in the fake card the long con company is showing, it is too wide.



BFL is a long con.

http://en.wikipedia.org/wiki/Confidence_trick

If you look at the center cylinder of the fan, surrounded by a circle of blades with the empty space between the center cylinder and the blades, you'll notice that the empty space is narrower at the front (towards the viewer) than at the back. And it's obviously a rendering. They didn't take pictures of anything here. The whole thing is obviously rendered. But so what? That's not a sign of a con. They had bad renderings of a BFL Single circuit board, too, remember?

TDP of 5970 is 294W and 5870 is 224W.   The card is reported to be 350W which is significantly higher not lower.

Also this pretends away the challenges of the form factor and ignores it was AMD with three decades of experience, and the HD 5000 series was their 12th generation of graphics cards.

...

While 350W is possible in that form factor one would have to be willing to bet that unlike every other time the simulations aren't lower than reality AND that the company doesn't run into any cooling/power problems due to the extremely high energy density.   As for 350W being conservative?  I don't see it.  350W is 0.6 w/GH.  BFL current chips are 3.1 w/GH correct?  A die shrink conservatively means at best a 40% reduction in power (miners tend to be always on so we are really only interested in active load).  28nm is two die shrinks from current chip.  So 3.1 w/GH * 0.6 * 0.6 = 1.1 w/GH.  If the current generation was just a die shrink (Intel's tick/tock strategy) we would be looking at 1.1w/GH (660W for this card).  You stated you will both shrink and optimize (something Intel split up to reduce risk) but that is a rather significant optimization wouldn't you say?  Nearly an 86% (1.1/0.6) improvement in performance per watt outside what is gained from the die shrink.  Intel (that small rookie ASIC designer) is happy for a 10% improvement in performance per watt from architectural changes.

Given the aggressive improvement in performance per watt necessary, combined with the lack of any headroom (if it misses by even 20% then it can't be cooled in that form factor at that speed), it would need to be a nearly flawless design and execution from start to finish.   It certainly "can" be done (it isn't beyond the theoretical limits of silicon on forced air cooling) but given BFL past promises on power and cooling well one would be betting that "this one will be different".  

Picture says 600 GH/s @ 350W.
BFL "engineer" (who's area of expertise is Visual Basic and .NET) says 0.77W per GH/s

Unfortunately, multiplication says 600 GH/s * 0.77W per GH/s = 462W

Based on everything we know about multiplication (FPGA, CPU, GPU. etc) that should mean you are just as good at guessing TDP in August of 2013 as you were in August of 2012.

Regarding 5970 and 5870, it was my mistake looking at some charts (I'm not good with GPUs generally), what I meant was 6990. The actual design was modified, stray capacitance and flip-flop instability was resolved (which were causing the majority of consumption). The numbers we have are lower, and were reported here with margin. The migration between Stratix 3 and Arria 2 GX (Original single vs. MiniRig FPGA cards), proved a 50% reduction in power. As both were doing SHA256, taking 50% for this case would be a reasonable number. Including the corrections made to stray capacitance and flip flop instability, the final figures arrive at an even lower number. The number announced by us is the worst case scenario based on what we have in our hands; however, as stated, these are estimations.

Why would you presume that? BFL has no internal ASIC or FPGA design experience. Everything is outsourced.

This is the resume for their "CTO/CEO" who supposedly resides in France.

Note the total lack of relevant experience.

Maybe later generations will call it the "Inaba scheme" 

I'd like to know "where the fuck is the guy who has a paid lawyer"
If we dont have someone with money to hire a lawyer, Could we atleast fund a "lawyer pool" for some trusted forum member to use the pool fund to hire a lawyer to look meanly at BFL?