When will i be able to use that on my Ztex Cluster ?
4.1. At 8A the power dissipation of the FPGA is about 10W. The thin CGS484 packages have a junction-case thermal resistance of 2.2 K/W. Plus 0.3 K/W for the thermal grease this results in junction temperature of 70.5°C, if the bottom of the heat sink is 45°C warm. This should be still o.k. but there is not much margin for improper installed heat sinks or so. And many users had problems with this because the plastic packages are not very flat.
For comparison: The thermal resistance of the thick FGG484 packages which are used for most other LX150 FPGA boards is 3.7 K/W. Plus 0.3 K/w for the thermal grease
leads to a junction temperature of 85°C at 8A, 96°C at 10A, and 106°C at 12A, 133°C (!) at 22W (bitfury bitstream) ...
Ztex, I will correct you...
1. It's about 12W, not 22 W, that is very important.
2. Datasheet says 6.3 K/W thermal resistance for FGG484 package to board, so about 3 W goes to board.
(1) and (2) => we get about 33 degrees overheat...
Airflow 1 m/s. TUNED by that large green thing from behind to harmonize heat exchange with cooling water.
Thermal image of chip heatsink - about 36-45 degrees.
Thermal image below chip - about 50-60 degrees.
So I would expect junction temperature in range 70-85 degrees. depending on chip location and temparature
of cooling fluid.
3. Yes, it is overall hot, that is why we have about 20 degrees air inlet before chip, and specific setup, placing
not more than 2 heatsinks in way of airflow.
If same measures for cooling won't be taken - it will not fly. And so it will not work on most deployed spartans or
home-brew boards.
It took significant time to model this.... So it is not the thing, that we got "by chance".
Then - we took FGG484 package mainly because we thought to place more 0402 capacitors right below it to provide better power. Maybe this is not necessary step, we haven't done EM modelling.