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    Author Topic: A Warning to ASIC Manufacturers.  (Read 32 times)
    BobsSocks (OP)
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    August 28, 2026, 06:37:13 PM
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    The company Quantum Blockchain Technologies was recently allowed a Patent on what they term ASIC Ulra Boost. The case file can be found here,

    https://globaldossier.uspto.gov/details/US/18696073/A/129692

    Marketing here,

    https://quantumblockchaintechnologies.co.uk/patents-ip
    https://quantumblockchaintechnologies.co.uk/images/QBT_ASIC_Ultra_Boost_Overview.pdf
    https://quantumblockchaintechnologies.co.uk/images/ASIC_Ultra_Boost_White_Paper.pdf
    https://quantumblockchaintechnologies.co.uk/images/AUB-Patent-Application-Abstract.pdf

    Today they posted the following message to X,

    https://x.com/QBTOfficial256/status/2093359908485730552

    Quote
    QBT is now planning to begin behavioural checks on commercial ASICs, screening for signatures consistent with ASIC Ultra Boost - to be carried out in our Milan lab. A black-box approach: no de-capping, just controlled inputs and observed response. A lead, not proof.

    The graphic below the post includes the following words,

    Quote
    Planned not yet performed - any result would be circumstantial. This kind of analysis cannot see inside the silicon and any real conclusion would need further professional legal and technical review to mean anything.

    This is a blatant threat to any ASIC manufacturer that should they find evidence that you are using the methods described in their allowed patent, it still needs to be granted which will happen 4 to 6 weeks after the allowance fee was paid, they will be coming after you.

    In effect they seem to wish to become Patent Trolls.

    Let me start by saying I am NOT a Patent Lawyer... However,

    For any Patent Lawyers working for such ASIC manufacturers I would recommend that you follow the history of this application through to grant on the following pages,

    https://www.search-for-intellectual-property.service.gov.uk/GB2113962.1
    https://register.epo.org/application?number=EP22793447&lng=en&tab=doclist
    https://globaldossier.uspto.gov/details/US/18696073/A/129692

    In particular pay attention to the prosecution history for the US filing.

    It is very important that you understand that as originally filed the applicants claimed many optimization methods that were ultimately disallowed by the US Patent Examiner, non final rejection and final rejection, as a result of prior art.

    The US Patent Examiner insisted that the independent claims were too broad in that they would have protected this material and forced them to move the one piece of allowable material into the independent claims whilst allowing them to retain the disallowed material as dependent claims under this.

    Hopefully this link will get you a copy of the Notice of Allowance that includes those claims and the wording insisted upon by the Examiner. The US website appears to use session cookies.

    https://register.epo.org/ipApplication?documentId=MRWFN840X247X24&number=US.202218696073.A&patentScope=false

    It is my belief that at least 50%, likely much more, of what is in the dependent claims can be implemented without infringing the restraints placed on the Independent claims and as such you will have a defensible case if you do so and also if you already have included these optimizations in your present designs.

    It is my supposition that QBT have either been unable to generate any interest for their, now limited, IP amongst ASIC Manufacturers and this recent X post is PR show for prospective investors in the company.

    If you are an ASIC Manufacturer then please give this message serious consideration and at least be prepared for this threat and better still work in collaboration with the community to publicize and act against it.

    Give them the publicity they crave.
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