Well, look at the code. There is no plain english write up AFAIk, but it is open source after all.
The innermost loop is changed which is probably what you would want to burn into hardware directly for maximum efficiency, especially if you had no reason to expect such a change to be made.
Going forward there is more risk that ASICs may be built in a more flexible manner.
I wish I still had that ability to read the code but I like most of the people interested in this project have to rely on the Devs answers to our questions if something is not clear to us. Yes I'm sure in the future the asic design will become more flexible, for instanceI would have designed the chips to be removable for easy swapping, IMO that was a foolish design flaw, sockets are cheap. Sometimes engineers do not see the trees for the woods or is that supposed to be the other way around?
