Yup ...i actually saw that interview....Jobs more or less screwed gates ....it was funny ...

I think still jobs is laughing as what he achieved, gates will not be able to achieve in his life time...current apple market cap 456 billion , Microsoft 264 billion....Microsoft neither have that finesse nor vision that Apple had......    

In any case lets start another thread for this as this is suppose to be a KNC thread ..lol

Yes, but do the math: You have a bitcoin hashing chip that can do 100Gh/s.  Today that's about $110 a day. $780 a week. Even if you had a 50% yeild, why would it matter if you had to throw away a PCB for every single working chip if it meant getting your chips a week earlier?

Give it a rest. You're blowing this up completely out of proportion from a throwaway remark made at an open day months ago. As I said earlier, testing is what the semiconductor industry does.  Yes, this can be skipped for the very first samples off the production line, but its not the norm for production parts and won't be the norm with KNC either. Not sure what your point about customer or 3rd party testing is about ... chip packaging and final test is subcontracted, the test equipment is already there. You may need a custom socket/interface card built, but there are also standard fixtures for all the common packages, which will be perfectly adequate for the majority of devices.

That's what I've been saying the whole time. Chips are tested in the fab during production using supplied test vectors. I've described the procedure above.  The standard procedure is also to include scan insertion and generate test vectors for the tester.

But now you are providing some new information: That KnC will do testing when they scale up the production? This contradict with information given earlier.

But I don't understand why they would want to skip testing on this in the first batch? (unless they just want devices for a photograph)

When they assemble their first set of miners and it does not work they will not know if it's a problem with the fabrication of the particular chip and will have to spend more time debugging trying to figure out where the problem is (device production, functional errors, software problems, power issues, FPGA logic, etc). If the device passed the chip level test you have one less unknown factor.

I should have put a smiley there. Since they might be defective and only suitable for a photo.



In the case of a miner the wasted PCB is marginal, but packaged defective chips would be more of a concern as well as the time it takes to produce the defective board. However, the redundancy might give them the revenue they want even if they are wasting money on faulty devices.

If the NRE is $1M and each chip is $200 (just guessing some numbers, add real numbers if you have them), and you get a couple thousand defective/reduced capacity devices this part is significant. But what is the reason for wasting this money by not providing test patterns and do testing in the fab?


That's my point and what I have argued the whole time. All they have to do is provide some  test vectors and run them on the chip tester. This is common practice and quick and pretty cheap (even though you pay for tester time). And then why not do it properly and do scan insertion and ATPG to cover the other parts which is pretty much standard procedure in the industry these days.

Is the word may in your sentence above an indication of that you think this is something they should do, or that you have heard somewhere that they might supply vectors and run test on the tester?

Well, as I thought: Office Space 2 will have a character named Milton the test collator who will constantly mumble "scan insertion", "ATPG", etc.

But here's the usefull information for the future. Yield in semiconductor industry is defined as a percentage of the dies that are "good" as opposed to "faulty". The decision between good/bad is binary only when the die contains a single circuit. It obviously applies to a CPU or a similar chip, because such a device contains a JTAG chain that is essentially threading through the every flip/flop on the chip. So if a defect breaks the JTAG chain the die becomes untestable and it isn't even worth to package it.

In the Bitcoin mining ASIC realm currently only ASICminer and Avalon have a single-engine dies. So those are the only two vendors that could conceivably use "yield" as a single percentage value.

Every other Bitcoin mining vendor have multi-engine dies: BFL has 16, bitfury has 756. To make such a chip "fail" you'll have to either kill their control logic or kill all the engines. In all other cases the chip is neither "good" nor "bad", but has some "inbetween" value that is neither 0% nor 100%.

KnC went one step ahead and their die consists of 48 engines and 4 completely independent "control logic" and "power supply" circuits. To make such a chip "fail" you'll have to e.g. kill all 4 contol logic cicuits or 3 control circuts and all 12 engines in the quadrant with the working control logic. If you kill only 11 engines in the "good" quadrant your resulting chip is 2.08% "good" and still has more performace than the 100% "good" Avalon chip.

Semiconductor manufacturing plants are prepared to deal with both types of "yield": the binary "pass/fail" type and the contiguous "quality curve" type. The problem is that the "quality curve" testing is complex and expensive, and therefore used only for the analog or mixed-signal devices. The "pass/fail" test is indeed cheap and quick and it is used for the vast majority of digital devices. But the Bitcoin mining ASIC is a completely atypical digital device therefore applying even a very cheap pass/fail test to it is economically pointless.

I've typed all this because I hope this will be usefull for the readers not well-versed in the electroinic engineering. I don't hope to sway Milton the tester's kingcoin's opinion, but I presume that the concern trolls will like him will keep poping up on this forum for many months, until the ways to characterize yield and test Bitcoin ASIC will become a common knowledge and will move from this subforum to the mining software subforum.

Thank you. I love reading posts that inform!