The DE0-Nano-SoC is a great board to get into learning this stuff. I have this and a few of the Max10 50kLE boards that I occasionally use for initial RTL hardware evaluation because their just so easy to work with. Vivado and Xilinx’s tools are steeper learning curve, but definitely doable.

With that said, the Cyclone V 5CSEMA4U23C6N on that board is about 1/5th the logic of what I’m proposing and while it has high-speed DMA to the ARM cores, it doesn’t have any high speed IO such as PCIe to other peripherals. That makes it tough to use outside of single small algorithms (I.e. Keccak).  The $199 version of the M.2 has ~100 Logic Elements and the $329 version has more than 200, capable of running at higher speed. The top package also has 1GB DDR3. Peak power consumption is around 15W from on-board M.2


Here’s an update summary for those catching up on this thread:

1. A few of us have been working on algorithms on FPGAs, and they’re profitable. Whitefire990 intents to release his with miner/dev fee and others of us have decided to share with the community in various forms as well.

2. On the high end the VCU1525, based on the VU9P is a very good candidate for this. It is currently a Xilinx development board on promotion for $3995, but only very small batches are being produced and the price is set to go up. Some algorithms require connecting multiple with high speed links to achieve the best performance.

3. Senseless (and possibly self, if I can be helpful) have been organizing essentially a group buy - but with FPGAs it’s less of a group buy and more of a group build. That is expected to ramp up the VCU1525 style (some power/cooling improvements)  availblility in a similar price envelope to Xilinx dev version. Working on production in US and Europe so it can be available everywhere.

4. I’ve also decided to reveal one of the smaller FPGA options in the $200-350 price envelope that I had developed for internal use and deploy, to provide an entry level option. It has a slightly different set of capabilities from the big VCU1525, but for many things it does scale.

For both hardware offerings from the community (and possibly others) orders are expected to start in June.

These boards are not so much for Ethash (though they can be used to assist/accelerate GPUs in it) , or Equihash. They excel , can improve total system performance on, or are at an advantage on Keccak (and most SHA3 candidate) , Phi variants, NIST5, Timetravel10, Lyra/LyraRev2, etc.

Someone else can chime in if I missed anything.

What happens if coins move to ethash-like algorithms where the efficiency gains would be alot smaller?

Next gen Radeon Vega is rumored to have up to 1.28 Terabyte/s mem bandwith. IS there any FPGA (or announced) that would pull the same kind of perf ?

Very impressive !! When are these FPGA monsters supposed to be launched ?

The DE0-Nano-SoC is a great board to get into learning this stuff. I have this and a few of the Max10 50kLE boards that I occasionally use for initial RTL hardware evaluation because their just so easy to work with. Vivado and Xilinx’s tools are steeper learning curve, but definitely doable.

With that said, the Cyclone V 5CSEMA4U23C6N on that board is about 1/5th the logic of what I’m proposing and while it has high-speed DMA to the ARM cores, it doesn’t have any high speed IO such as PCIe to other peripherals. That makes it tough to use outside of single small algorithms (I.e. Keccak).  The $199 version of the M.2 has ~100 Logic Elements and the $329 version has more than 200, capable of running at higher speed. The top package also has 1GB DDR3. Peak power consumption is around 15W from on-board M.2


Here’s an update summary for those catching up on this thread:

1. A few of us have been working on algorithms on FPGAs, and they’re profitable. Whitefire990 intents to release his with miner/dev fee and others of us have decided to share with the community in various forms as well.

2. On the high end the VCU1525, based on the VU9P is a very good candidate for this. It is currently a Xilinx development board on promotion for $3995, but only very small batches are being produced and the price is set to go up. Some algorithms require connecting multiple with high speed links to achieve the best performance.

3. Senseless (and possibly self, if I can be helpful) have been organizing essentially a group buy - but with FPGAs it’s less of a group buy and more of a group build. That is expected to ramp up the VCU1525 style (some power/cooling improvements)  availblility in a similar price envelope to Xilinx dev version. Working on production in US and Europe so it can be available everywhere.

4. I’ve also decided to reveal one of the smaller FPGA options in the $200-350 price envelope that I had developed for internal use and deploy, to provide an entry level option. It has a slightly different set of capabilities from the big VCU1525, but for many things it does scale.

For both hardware offerings from the community (and possibly others) orders are expected to start in June.

These boards are not so much for Ethash (though they can be used to assist/accelerate GPUs in it) , or Equihash. They excel , can improve total system performance on, or are at an advantage on Keccak (and most SHA3 candidate) , Phi variants, NIST5, Timetravel10, Lyra/LyraRev2, etc.

Someone else can chime in if I missed anything.

33MB is a lot for on chip memory. VCU1525 also have up to 64GB of DDR4.

DDR4 is slow. You cannot use it for ethash or CN-7