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    Author Topic: Algorithmically placed FPGA miner: 255MH/s/chip, supports all known boards  (Read 119483 times)
    DILLIGAF
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    June 08, 2012, 10:33:20 PM
     #421

    edit; the other thing to bear in mind is that ASIC will not be the 600%~(math check needed) increase in efficiency that cpu to gpu was.

    Agreed.
    It could be much more than that.

    much more than that over FPGA? I'm very limited in my knowledge on the matter but I just don't see it.  Ztex for example is ~40 watts at 860MH(x 4 chips @45nm).  I'd hazard to guess a 65nm or larger(likely 90nm+ in BFL's build) asic is going to be what? 12w+ per chip and 800-1600MH?

    I believe the OpenASIC boys were talking 8gh/s 100w or so...
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